During a transfer process of this type, two substrates, respectively referred to as a “donor substrate” and a “receiver substrate,” are bonded to one another by molecular adhesion. Then, the donor substrate is thinned, for example, by grinding or polishing, in such a manner that a part of the donor substrate is transferred onto the receiver substrate.
Such a process allows multilayer substrates of any given type to be obtained, for example, comprising at least two layers of materials, semiconductor or otherwise.
Such a transfer process also allows a substrate comprising one or more intermediate layers to be obtained, sandwiched between a surface layer removed from the donor substrate and a base layer corresponding to the receiver substrate. It also allows a layer comprising all, or part, of one or more microcomponents from a donor substrate to be transferred to a receiver substrate, as is illustrated, for example, in U.S. Pat. No. 5,234,860 to Gluck, issued Aug. 10, 1993.
One particular example of this type of multilayer substrate consists of one known to those skilled in the art as a “semiconductor-on-insulator” (SeOI).
It has been observed that the substrates fabricated by the above-mentioned transfer techniques generally exhibit an annular region, referred to as a “peripheral ring,” in which the bonding between the layers is either nonexistent or of poor quality, owing to the presence of chamfers on the donor and receiver substrates used and commonly available. The presence of these chamfers leads to a low bonding energy around the edges of assembled substrates, or even of a total lack of adhesion.
As a result, the mechanical thinning step, which is conventionally implemented in order to form the transferred layer, tends to cause peripheral partial delamination of the transferred layer at the bonding interface. Furthermore, thermomechanical forces applied to the donor and receiver substrates during the thinning step may lead to a flaking phenomenon at a periphery of the transferred layer, such that the transferred layer then exhibits an irregular circumference.
The existence of a partial delamination and of an irregular circumference of the transferred layer creates a risk of particulate contamination of the equipment or of the substrates themselves, with bits of the transferred layer being able to break off during later processing.
This risk is further accentuated when the process of bonding the two donor and receiver substrates is carried out at a low temperature. This may be the case when the materials brought into contact are not able to withstand high temperatures (e.g., “silicon-on-quartz” (SOQ) or “silicon-on-sapphire” (SOS) substrates) or when at least one of the assembled substrates contains electronic or optoelectronic components, for example.
According to Japanese Patent No. 9-017984 to Shuei, published Jan. 17, 1997, a process for fabrication of a silicon-on-insulator (SOI) structure is known.
Japanese Patent No. 9-017984 makes reference to a prior art process consisting of bonding a donor substrate coated with an insulating layer and a receiver substrate by molecular adhesion, performing an annular trimming of an entirety of the donor substrate and of a part of the receiver substrate, etching a part of the receiver substrate work damaged by trimming, and then grinding a part of the donor substrate to obtain a surface layer of the SOI structure.
However, this process tends to amplify the phenomenon of peripheral partial delamination of the transferred layer at the bonding interface. Indeed, in the case of a bonded structure in which consolidation has only been carried out at a low temperature, the mechanical stresses introduced during the annular mechanical trimming of the entirety of the donor substrate and of a part of the receiver substrate can lead to localized or extended debonding of the bonding interface. The thermomechanical stresses on the structure are indeed significant during this step.
Another trimming process is described in the above-mentioned patent, Japanese Patent No. 9-017984. The trimming process comprises the following steps: trimming of only a part of the donor substrate up to approximately 50 μm prior to a bonding interface, so as not to damage the receiver substrate, and successive selective etching of the residual annular portion of the donor substrate and the oxide layer by means of a tetramethylammonium hydroxide (TMAH) solution.
This trimming process allows etching of the receiver substrate to be avoided.
However, in certain bonded structures, notably in an example in which the donor substrate is a substrate of the SOI type comprising a buried layer of oxide and a surface layer of the substrate includes microcomponents (circuits), the selective etching of the silicon of the donor substrate, previously partially trimmed, will stop at the buried layer of oxide of the donor substrate and at the base of the layer including the circuits; thus, a loosely bonded and irregular layer of 5 μm to 10 μm (thickness of the circuit) not removed, will remain at the periphery of the bonded structure.